Here is a nice slide to see the growth of users, data, devices, and interactions from 2008 to 2012.  The following is a slide from Intel Developer Forum’s keynote by Paul Otellini.

At Intel Developer Forum Machine Check Architecture (MCA) extensions was presented, and hardware failure was simulated.

This solution is in Windows Server 2008 R2.

MCA Devices

Microsoft Windows generic hardware abstraction layers (HAL) for Intel architectures (Halx86.dll, Halapic.dll, Halmps.dll, Halia64.dll) support the Machine Check Architectures (MCA) for the Intel Pentium Pro and Itanium processors. The HAL enables Machine Check Exception (MCE) reporting for all implementation-defined errors.

For more information about the MCA-specific interface for drivers for Intel Pentium Pro and Itanium processors, see MCA Interface for Drivers.

And, Intel has contributed the code to Linux.

Intel Contributes MCA Recovery Code to the Linux* Kernel
This code will allow graceful advanced Machine Check Architecture (MCA) recovery from memory errors on systems based on the processor code-named "Nehalem-EX". configured with large amounts of memory.

and Sun has done the work to add support to Solaris on AMD and Intel.

Generic Machine Check Architecture (MCA) In Solaris

The work described below was integrated into Solaris Nevada way back in August 2007 - build 76; it has since been backported to Solaris 10. It's never too late to blog about things! Actually, I just want to separate this description from the entry that will follow - Solaris x86 xVM Fault Management.

Why Generic MCA?

In past blogs I have described x86 cpu and memory fault management feature-additions for specific processor types: AMD Opteron family 0xf revisions B-E, and AMD Opteron family 0xf revisions F and G. At the time of the first AMD work Sun was not shipping any Intel x64 systems; since then, of course, Sun has famously begun a partnership with Intel and so we needed to look at offering fault management support for our new Intel-based platforms.

With MCA, you can monitor the processor error correction to detect the relationship of rising temperatures and processor errors.

Even if thermal alarms are going off on a server if there are no errors, should you panic?

Energy effficiency was a reoccurring theme at Intel Developer forum.  Here is a summary of the Intel Research labs  projects that are addressing power and energy use.

Wen-Hann Wang, “Innovative Research in Power and Energy Efficiency”
Director, Circuits and Systems Lab
Intel is poised to deliver dramatic improvements in the energy efficiency of computing devices. A broad set of research from Intel Labs is looking to extend beyond Intel silicon to include innovations across the platform. Wen-Hann Wang highlighted research in the key areas of circuits, architecture and platforms.
 Resilient Circuits – Under normal operating conditions, processors regularly experience dynamic variations that, left unchecked, could cause problems in operation. To protect against these potential problems, guard bands are put in place which intentionally slow the processor and also cause it to operate at higher power. Intel researchers have developed a new technology called resilient circuits that enable the system to run at faster speeds and lower power.
 These circuits detect potential problems on critical timing paths and when needed briefly re-execute at slower speeds to ensure correct results before returning to normal operation.
 Initial tests show a 21 percent throughput gain or 37 percent power reduction.
 Super Capacitors – Intel researchers have shown how super capacitors can be used to provide added power during short, peak demand cycles. Average power consumption of a laptop system is 17.5 watts, and in normal operation, intermittent power peaks can occur to more than double that. These peaks can force compromises in the choices of battery and power supply to ensure they can supply up to a steady 65 watts when needed. Wang explained how super capacitors could lead to more efficient batteries and power supplies while also enabling peak bursts of 70 watts for new features in the 2010 Core family of processors such as Turbo Mode.
 Energy Harvesting – Researchers at Intel Labs are engaged in long-term research to explore the viability and potential for harvesting alternative energy sources. Much of this potential (e.g., solar and kinetic) could be used to help extend the availability of computing.
 Low-Power Network Agent – Intel researchers have developed a low-power network agent that enables a computer or consumer device to enter a sleep state while maintaining

its network presence thereby significantly reducing its power consumption. The low-power network agent listens to network traffic and wakes the machine only for important packets.
 Platform Power Management - For meaningful improvements in energy efficiency, Intel researchers are looking beyond optimizing just a single component or device and considering platform behavior as a whole. Managing platform power well requires a broad set of changes in areas such as software, peripherals, core logic and telemetry. Intel is taking a fundamentally new approach to platform power management where the operating system provides guidance based on an understanding of the system as a whole while the hardware provides the fine grain power management across the platform to maximize efficiency. This technology will be in the ―Moorestown‖ platform which will achieve a 50x idle power reduction over the ―Menlow‖ platform.

Energy-Efficient Research has its own page on intel.com.

Home › Research › Energy-Efficiency

Energy-Efficient Systems Architecture - Intel Platform Research

As part of the Intel platform vision for architectural innovation, Intel is researching an Energy-Efficient System Architecture (EESA). EESA is a collection of technologies and architectural improvements that together will result in dramatically higher performance per watt for systems across market segments from small form factor to high performance servers. This research is concentrated on improving the power profile of Intel components, taking a systems approach to designing power efficient platforms, and collaborating with industry partners and customers to develop broader energy-efficient system solutions.

Fine Grain Power Management
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At the core of EESA research, Fine-Grain Power Management is an effort to gain more precise control of power and performance across the platform. With precise power management embedded throughout the platform, performance can be maximized while power usage is precisely optimized for the workload. FGPM is the architectural foundation of Intel's research in creating dramatic improvements in energy-efficiency for systems whether small or large.

Power Delivery
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EESA is researching methods to increase the efficiency of how power is delivered from the source to the place where actual computing is done, also referred to as “wall to workload.” Repeated power conversions and inefficient design in current systems result in delivery efficiency as low as 50%, meaning half of all power usage is wasted before supporting the workload. Intel is developing methods to improve power delivery to the platform and how to achieve power conversion efficiency targeting 90%.

Visibility and Control
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All around a system is information that is useful in determining the best power management policies. Under Visibility and Control, Intel is researching how various environmental sensors, as well as other system information can be delivered and used to achieve the most energy-efficient platform. Sensing and analyzing both external and internal information allows the platform to make better decisions about the use of energy.

I/O Optimization
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To maximize energy-efficiency across the system, the platform needs to coordinate with external devices to make sure that workload resources are used in an efficient way. Many I/O devices on a system require constant attention by the platform to function properly. The I/O Optimization research is focused on finding new ways to reduce external interfaces' constant dependency on the chipset, thereby allowing the platform to reduce power and increasing overall system performance per watt.

Power Management Policy
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The components of EESA provide the tools to maximize performance per watt on the system. To make the best use of those tools, Intel is researching Power Management Policies that are designed to look at all available information, and make the best use of system resources to maximize performance when necessary, while minimizing power usage whenever possible. The Power Management Policy is the key intelligence in the EESA definition to achieve dramatic improvements in performance per watt.

Executive Blog

Join Chief Technology Officer Justin Rattner as he looks into the future at ZDNet's “Over the Horizon”blog.

Thanks to meeting some of the Intel Research engineers at IDF, I have added a stop at their labs the next time I am in Portland/Hillsboro in October.